Integrated circuits including field-effect transistors (FETs) with multiple threshold voltages (Vt) are often utilized in order to optimize the delay in switching or power leakage. As the size of integrated circuits decreases, it has become desirable to increase the density of the FETs on a substrate. Horizontal nanosheet field-effect transistor (hNS-FET) devices have been developed that include multiple horizontal nanosheets serving as conducting channel regions to enable larger effective conduction width in a small layout area overlying a substrate. There are several desired features of hNS-FET. For example, the channel thickness of an hNS-FET can be finely tuned, and two or more nanosheets can be stacked over one another at the same layout area.
It is also highly desirable to have small vertical spacing (VSP) between adjacent nanosheets in a stack of nanosheets to reduce the parasitic capacitance associated with the hNS-FET, so as to improve circuit speed. However, the VSP must be of a sufficient value to accommodate the gate stack to be formed therein. A gate stack generally includes a work function metal (WFM) that sets the threshold voltage (Vt) of the device, a high-K (HK) gate dielectric material separating the WFM from the nanosheets, and other metals that may be desired to further fine tune the effective work function (eWF) and/or to achieve a desired resistance value associated with current flow through the gate stack in the direction parallel to the plane of the nanosheets. As such, to achieve a thin VSP for reduced parasitic capacitance while being of sufficient thickness to enable different eWFs to be formed therein is a significant integration challenge.
Further, in related art integrated circuit with multiple threshold voltage (multiple Vt or mVt) devices, the desired Vt value for each of the hNS devices is achieved by utilizing different work function metals for each of the hNS devices, due to the need of different effective work functions associated with each of the multiple Vt values. As such, the deposition of the WFM for each of the hNS devices may require a separate processing step.